As AI workloads explode in scale, the networking backbone that ties together thousands of GPUs is under unprecedented strain. The sheer bandwidth and low-latency demands of next-generation AI systems are pushing the industry to move beyond copper cables and conventional optics, turning instead to light for communication. Nvidia, one of the leading players in AI infrastructure, is now positioning silicon photonics as the cornerstone of its future platforms. At this year’s Hot Chips conference, the company unveiled new details about its upcoming Quantum-X and Spectrum-X interconnection solutions, due to arrive in 2026.
Nvidia’s photonics strategy will closely track TSMC’s COUPE roadmap, which rolls out in three stages. The first stage introduces an optical engine for OSFP connectors, capable of 1.6 Tb/s transfer speeds with reduced power use. The second stage pushes deeper into CoWoS packaging with co-packaged optics (CPO), lifting throughput to 6.4 Tb/s at the motherboard level. A third stage is planned to integrate optics directly within processor packages, targeting 12.8 Tb/s and even lower latency and power draw.
The reason for Nvidia’s shift is clear: massive AI clusters require GPUs to operate almost as one unified system, which radically changes networking design. Traditionally, each rack had its own top-of-rack switch linked by short copper cables. But with hyperscale clusters, these switches are relocated to the end of a row to form a seamless low-latency fabric across multiple racks. This greatly extends the distance between servers and their first switch. At speeds of 800 Gb/s, copper simply cannot keep up, forcing optical links into nearly every connection.
Yet the current standard—pluggable optical modules—has serious drawbacks. Signals must leave the ASIC, travel through traces and connectors, and only then be converted to light. This detour leads to crippling 22 dB electrical losses at 200 Gb/s channels, demanding complex signal compensation, adding up to 30W per port, and creating cooling challenges. Nvidia describes this approach as “almost unbearable” at AI scale.
CPO sidesteps these inefficiencies by embedding the optical engine directly next to the switch ASIC. This means signals are coupled to fiber almost immediately, cutting electrical loss to just 4 dB and reducing power consumption to 9W per port. By removing extra components, reliability improves and deployment is simpler.
Nvidia highlights dramatic benefits: a 3.5x increase in power efficiency, 64x better signal integrity, 10x improvement in resiliency thanks to fewer active devices, and around 30% faster deployment. In short, by integrating optical conversion into switch silicon enabled by TSMC’s COUPE process, CPO achieves leaps in efficiency, reliability, and scalability that pluggable modules cannot match.
Nvidia will bring these CPO-based systems to both Ethernet and InfiniBand networking. The first wave will debut in early 2026 with Quantum-X InfiniBand switches. Each switch is designed for 115 Tb/s of throughput, offering 144 ports at 800 Gb/s apiece. These platforms will also integrate an ASIC delivering 14.4 TFLOPS of in-network processing and support Nvidia’s 4th-generation Scalable Hierarchical Aggregation Reduction Protocol (SHARP), aimed at reducing collective operation latency. To manage the heat generated by such performance, the switches will rely on liquid cooling.
With silicon photonics and CPO, Nvidia is making a clear bet: that future AI clusters, comprising tens of thousands of GPUs, will only be possible if light replaces copper at every critical networking layer.