A team of engineers at the Lawrence Berkeley National Laboratory successfully manufactured a 1-nanometer-long transistor gate. The gate is being claimed as the world’s smallest operational transistor.
Transistor size plays a significant role in enhancing the efficiency of the computing systems. Smaller the transistor size, more of these can be placed on a chip to engineer faster and more efficient computers. Moore’s Law is one of the best-known principles of electronics and computing. The law states that:
“The number of transistors in a dense integrated circuit doubles approximately every two years.”
Moore, the co-founder of Intel, predicted that the same trend would continue to be observed in the future as well. The present technology employs 14nm semiconductors. New breakthroughs in semiconductor fabrication promise 10nm gates to be released in 2017 or 2018 including the Cannonlake series from Intel.
However, with the latest innovations in engineering and scientific advancement, the Moore’s Law faces some issues. Albeit the fact that a 7nm semiconductor node is technically viable, moving beyond this limit introduces the phenomenon of quantum tunnelling in electrons. Quantum tunnelling ensures a continuous flow of electrons from one gate to the other, instead of being confined to the intended gate. This implies that the transistor cannot retain the ‘off’ state.
The researchers from the Lawrence Berkeley National Laboratory employed carbon nanotubes and molybdenum disulphide (MoS2) to go beyond the 7-nm transistor limit. The hollow carbon nanotubes are used as a gate to control the electron flow while MoS2 acts as a semiconductor.
Despite the promising results shown by the world’s first functional sub-7nm transistor, the team at the Berkley Labs has yet to come up with a feasible solution for the mass production of the 1nm gates as well as a chip to put them on.
